Design Verification Engineer

Location: San Jose, CA/Toronto, Canada

Job Type: Full Time

Summary Of Position

You will be part of the ASIC Verification Team, creating and bringing to market client's next generation camera processors.

Responsibilities

  • Develop test strategies to verify next generation camera processors
  • Develop and review block and chip level verification environments and test plans
  • Work closely with design engineers to develop test benches and test plans to meet coverage goals
  • Participate in selecting best in class 3rd┬áparty protocol verification IP
  • Help enhance the overall DV methodology by analyzing 3rd┬áparty verification tools
  • Debug failures in simulation and collaborate with designers in identifying root-cause issues
  • Work with the systems and software teams on emulation platforms
  • Participate in the bring-up and debug of the device prototype
  • Provide support to the Product Engineering team to meet all validation and qualification goals for the product

Minimum Qualifications

  • BSEE/BSCE/BSCS
  • 5 years of industry experience design verification
  • Experience with test planning, test bench architecture and assertions
  • Constrained random verification experience with SystemVerilog using UVM
  • Coverage driven verification (code/functional/assertion coverage)
  • Strong programming skills in C/C++ and scripting experience with Python/Tcl/Perl

Preferred Qualifications

  • MSEE/MSCE/MSCS
  • Camera or video processor verification experience
  • SystemC experience
  • RTL design experience
  • Formal verification experience
  • Experience with continuous integration systems like Jenkins or Buildbot
  • Experience with emulation platforms

 

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